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6 ATA command description
This section provides information on the ATA commands supported by the CFAST card. The commands are issued
to the ATA by loading the required registers in the command block with the supplied parameter, and then
writing the command code to the register.
ATA Command Flow
DDMAI0: DMA_in State This state is activated when the device receives a DMA data-in command or the
transmission of one or more data FIS is required to complete the command. When in this
state, the device shall prepare the data for transfer of a data FIS to the host.
Transition DDMAI0:1
DDMAI1: Send_data
Transition DDMAI1:1
DDMAI2: Send_status
Transition DDMAI2:1
When the device has the data ready to transfer a data FIS, the device shalltransition to
the DDMAI1: Send_data state. Transition DDMAI0:2 When the device has transferred all of
the data requested by this command or has encountered an error that causes the
command to abort before completing the transfer of the requested data, then the device
shall transition to the DDMAI2: Send_status state.
This state is activated when the device has the data ready to transfer a data FIS to the
host. When in this state, the device shall request that the Transport layer transmit a
data FIS containing the data. The device command layer shall request a Data FIS size of
no more than 2,048 Dwords (8KB).
When the data FIS has been transferred, the device shall transition to the DMAOI0:
DMA_in state.
This state is activated when the device has transferred all of the data requested by the
command or has encountered an error that causes the command to abort before
completing the transfer of the requested data. When in this state, the device shall
request that the Transport layer transmit a Register FIS with the register content as
described in the command description in the ATA/ATAPI-6 standard and the I bit set to
one.
When the FIS has been transmitted, the device shall transition to the DI0: Device_idle
state.
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.41
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
F-100_data_sheet_CA-HxBR_Rev141.doc
Page 12 of 51
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